This program is developing the co-design framework of atoms-to-architectures to enable sub-100mV switching of non-volatile logic-in-memory, and ultra-efficient digital signal processing for applications such as IoT, sensors and detectors. It focuses on the manipulation of energy landscapes in ferroic systems which will enable tuning barriers to switching within prototype devices, create multi-well structures for non-binary logic, and couple charge and spin to build non-volatility and logic functions. The program harnesses unique experimental and computational tools at Lawrence Berkeley National Laboratory to accomplish this. Its scientific mission is built on a core guiding principle that a significant opportunity exists for use-inspired basic science to enable highly energy-efficient computing by exploiting correlated phenomena and consequently lowering the operating voltage. Orders of magnitude improvement in energy efficiency are possible by exploiting electronic charge/spin and dipolar order. The design and manipulation of energy barriers to specifically reduce the operating voltage (well below that of today’s CMOS technology) to 100 mV and lower, and exploiting the non-volatility of these materials in a merged logic in memory fabric can yield 1000x reduction in overall energy consumption.


No publications are available at this time.